Multilevel Logic: Finding the Kernels

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En provenance du cours de University of Illinois at Urbana-Champaign
VLSI CAD Part I: Logic
74 notes
University of Illinois at Urbana-Champaign
74 notes
À partir de la leçon
2-Level Logic Synthesis, and Multi-Level Logic Synthesis via the Algebraic Model
In Week 3, we will move from "representing" things to "synthesizing" things. In this case, synthesis means "optimization", or maybe the word "minimization" is more familiar from hand work with Kmaps or Boolean algebra.

Rencontrer les enseignants

  • Rob A. Rutenbar
    Rob A. Rutenbar
    Adjunct Professor
    Department of Computer Science

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