In this video, we will conclude our study of the two-terminal MOS structure by discussing it's small signal capacitance. Let us now look at the structurally we have been discussing all along, where we have learned how develop expressions for their charges satisfaction of the total voltages. And consider a small-signal situation where the externally applied voltage VGB changes by a small amount delta VGB. Therefore, the gate charge will change by small amount, delta q g. And the space charts here, q c, will change by a small amount delta q c. We are interested in developing a simple model that relates those changes, and the idea is similar to the small signal model we develop for p injunctions. We will derive an expression for CGB, the gape body capacitance, small signal capacitance that relates delta VGB to delta QG, and if these is plus delta QG then at the bottom, we should have minus delta QG and CGB would be a linear capacitance in terms of how it relates changes of charge to changes in voltage. The value of CGB itself depends on the bias voltage VGB, around which delta VGB is taken. So we defined CBG as delta QG over delta VGB, right, or more precisely, we use a derivative to do it like this. But we know that the change in VGB is shared by a change in the oxide potential and the change in the surface potential. So when you change this, both this and this will change by the corresponding delta values. Well, one over Cgb looks like this. And now this can be expressed as a corresponding sum of differentials. So we have this equation. Okay? And I can take the inverse of that, and put it into the denominator. And do the same over here. Now I can define this as a new capacitance, right. It has dimensions of charge over potential and I can define this as a new capacitance. But in doing so, I will take advantage of the charge balance equation for charges delta QG plus delta QC equals zero, and we'll replace delta QG by minus delta QC, as shown here. So we have this one over Cgb, all this per unit area, that's what the prime means. It's equal to one over this capacitance and this capacitance is this. Why is this c ox? Because it relates the charge of this so-called two plate capacitor, the charge on the top plate, to the potential between the two plates, c ox, and we already know that the oxide has a capacitance c ox, and per unit area c ox prime. So this is c ox prime, and this one I define as CC prime. This is the space charge small-signal capacitance. The reason for the minus sign will be clear shortly. This one, from circuits you know is nothing but the serious combination of two capacitances. This one, and this one. The sum of them is equal to the equivalent capacitance. So, cgb is a capacitance between these two terminals, and it is the capacitance of two capacitors seen here as c ox and cc. At the top leg of c ox, we have delta qg, exactly what you had over here. At the bottom over here, you have delta QC, because the bottom plate here corresponds to the region over here, and QC is what is changing by delta QC. Now, if you want to find an expression for CC and you know the charge here and the potential here, how would you do it? If this is plus delta QC, then over here on the other plate is minus delta QC. So you take the top plate charge, minus delta QC, divide by delta CS, and you get CC. This is where this definition comes from. And this is where the minus sign comes from. In other words, CC is nothing but a capacitance, that across it has a potential delta psi s. And it has plus delta Qc at the bottom plate, minus delta Qc at the top plate. So if you divide this charge by this voltage, you get Cc. And it is clear that this definition makes sense. So now keep these things in mind so we can go to the next slide. And in the next slide we will explicitly look at the nature of Qc. In inversion where we're mostly interested in developing results, Qc consists of two types of charges, the inversion region charge, and the depletion region charge. This is the definition of Cc from before. Since a change in the total charge in the semiconductor is the corresponding change in the depletion region charge and the change in the inversion layer charge, plug this into there and you get this. So now, this has dimensions of capacitance charged over voltage and so does this. So I can define two new capacitances, one corresponding to the depletion region charge and one corresponding to the inversion layer charge. And the first one, the first one, this one, I could call cb. The second one I will call ci. So we see that the total capacitance of c is the sum of two capacitances. This is equivalent to putting two capacitors in parallel. In the previous slide we derived this equation so now, instead of CC I can use this, and I get this equation. And what is this equation? Basically it describes a single equivalent circuit. it says that the CGB, the capacitance between here and there, is the series combination of an oxide capacitance and another capacitance over here that is the sum of CB and CI. And all of the charges and potentials that I have talked about are included in this picture, so that you can make sure that everything makes sense. Please spend some time to think about this concepts. Sometimes, there is confusion about minor science and so on, I hope I made those clear, but if not, please go back and look at the reason again. Finally we're ready to plot CGB. Because we have expressions for the surface potential as a function of VGB, for a given VGB we can find the surface potential, and then from the surface potential and from the definitions of the various capacitances, let's say here and there, we can find the value of the capacitances, put them in here, and find the total Cgb. So I'm bypassing all of this, I will show you the result. This is the region we're talking about. This is the equivalent circuit I just showed you and this is the plot. Here we have gate well compastance, the small signal compastance between gate and body, which I remind you relates small changes of the externally applied voltage to the corresponding small changes in the charge on the gate, QT here. And all of this is plotted first with VGB. VGB varies from below flat line for your accumulation to above flat line for your depletion weak inversion, moderate inversion and finally strong inversion. And what you get is a curve like this. This is what the math gives you. If you just blindly plug in numbers into the formulas I just showed you, this is what you get. I'm bypassing, of course, the algebra. But at least we should be able to make physical sense of this situation here. Why is it that when we are deep in accumulation, CGB is practically C OX? Well, because when accumulation we don't have the situation shown here, there is no deletion region then a lot of hole pile up right before the surface. So it's like having a part of a plate capacitor with plenty of charges on the gate and plenty of charges right at the bottom plate, so between the two plates, the only capacitance you have is basically C ox. So this makes sense. It also makes sense that very deep in strong inversion the capacitance approach is C ox y, because now the top blade consists of a charge at the gate, right above the ox site, and the bottom plate consists of the inversion layer right below the ox site. Again you have a two plate capacitor. So the capacitance between these two plates is C ox. All this provided we allow enough time for the electric concentration to follow the variations in VGB, as I will explain in a moment. Now in between these two, the capacitors goes down, why does it go down? For example, when we are in depletion before the internal layer charges form, we have the oxide capacitors in series with the depletion region capacitors, which you see here. Oxide capacitors in series with the depletion region capacitors before you have any inversal layer to speak of, so therefore the combination of the two capacitances in series is less, and it goes down, and the larger the VGB, the more it goes down, because the deeper the depletion region becomes. So when you change VGB by a small amount there, you change the charts in the semi conductor by depleting more atoms over here. If this delta q b, that happens over here, is far away from the gate, this distance corresponds to a smaller capacitance. And it would keep going down, except that eventually when Vgb is large enough, you start getting an inversion layer, and once the inversion layer happens, again, at the bottom plate of the capacitor is right below the oxide, because we have plenty of electrons so it has to go up. Like this. Now the question is where do these electrons come from? You have to sit and wait there for the electrons to be generated from hole electron pair generation due to thermal agitation. So any electron hole pair that is generated in the depletion region, due to thermal agitation, has its electron split and it goes towards the surface where the surface potential is positive. And the hole goes down towards the bulk. If the variations of the gate body voltage are very slow, then you allow enough time for electrons at the surface here, to follow this variation. In other words, if your variation of Vgb is much smaller. Now, the time scale it takes for these electrons to adjust themselves due to thermal generation, then you can assume that you actually do have a bottom plate over here. And this is why the total capacitance is approximately C ox. But if you now start varying your VGB fast, before the electrons here have a chance to adjust their concentration accordingly, then the fast variations of VGB imply fast variations of the gate charge, which will demand a fast change below here in the negative charge in order to maintain overall charge neutrality. And because now the electrons don't have time to adjust themselves, you will be depleting the depletion region over here, so the bottom of the the depletion region will be going up and down, in accordance to the voltage variation between gate and botom. So in that case, Ci is irrelevant. You basically have C ox and Cb. In serious and the total is shown by the broken line. So to summarize then if you are varying your VGB, if your delta VGB is an AC volt that varies fast, then you have this situation, but if it varies slowly then you can be here. For example fast could mean 100 kilohertz and slow could mean one hertz. It all depends on the details of the structure and on temperature. So in this video, we saw how we can calculate small signal capacitance of two terminal immobile structure, and, needless to say, these concepts will be needed for our discussion of the MS transistor capacitances. Now we're getting to the MS transistor. The next topic is the three timing LMI structure, and it will be a very brief discussion of how these results get modified when you have added a third terminal. And immediately after that we'll add the fourth terminal, and we will start talking about the OS transistors.