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Avis et commentaires pour d'étudiants pour FPGA Softcore Processors and IP Acquisition par Université du Colorado à Boulder

4.0
étoiles
52 évaluations
14 avis

À propos du cours

This course will introduce you to all aspects of development of Soft Processors and Intellectual Property (IP) in FPGA design. You will learn the extent of Soft Processor types and capabilities, how to make your own Soft Processor in and FPGA, including how to design the hardware and the software for a Soft Processor. You will learn how to add IP blocks and custom instructions to your Soft Processor. After the Soft Processor is made, you learn how to verify the design using simulation and an internal logic analyzer. Once complete you will know how to create and use Soft Processors and IP, a very useful skill. This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or two of video lectures, reading assignments, discussion prompts, and an end of module assessment....

Meilleurs avis

BT

11 juin 2021

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

OS

8 déc. 2020

I feel I did another small step towards mastering designing with fpga. Thank you!

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1 - 14 sur 14 Avis pour FPGA Softcore Processors and IP Acquisition

par Claudio C

11 déc. 2021

As the rest of the courses in this specialization, it is w​aste of time. Not worth it.

par Brandon R V

11 oct. 2020

Loved the course!

I'm trying everything on my new DE10-Lite.

There's a steep learning curve on the first two weeks, but it all comes together mid week 2.

I had a lot of issues but all of them got solved in the discussion forum.

par Ovidiu S

9 déc. 2020

I feel I did another small step towards mastering designing with fpga. Thank you!

par KIMBULOBBE H M T M S S

14 oct. 2020

I learned a lot about modelsim that I was really needed.

par Saadiqbal

3 août 2021

This course brought a great deal of insight in the designing of:

1. NIOS-II processor

2. Integration of pre-existing IP-cores with your design

3. The simulation, debugging and verification of hardware

The core concepts (I have taken from this course) are gemstone and will be guiding star for my future "Embedded system Designing endeavor".

par Bình Đ T

12 juin 2021

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

par Habte G

2 janv. 2021

Well prepared lessons(videos). Concise and complete.

par hamza s

24 oct. 2021

Very helpful, Thnaks for all

par P R

11 mai 2022

Excellent

par Harold A M S

7 sept. 2021

The course bring good theoric bases to IPCores but leaves short informacion about the Qsys use, memory map and others things that are necesary for system integration.

par Michael W B

11 août 2021

I was hoping to get more lecture material on writing testbench code.

par Alex G

29 sept. 2021

The examples do not compile easily in quartus 20.1. Coding examples need to include more about software and building something that actually works. Course needs to be updated.

par Anthony P

18 nov. 2021

A lot of just slide reading and listing, last week of the course is cool because you understand a bit better the simulation

par Julien T

3 févr. 2022

No hands on exercises, we "learn" how to make test benches without practising...