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Avis et commentaires pour d'étudiants pour Hardware Description Languages for FPGA Design par Université du Colorado à Boulder

4.3
étoiles
219 évaluations
66 avis

À propos du cours

This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree. Hardware Description Languages for Logic Design enables students to design circuits using VHDL and Verilog, the most widespread design methods for FPGA Design. It uses natural learning processes to make learning the languages easy. Simple first examples are presented, then language rules and syntax, followed by more complex examples, and then finally use of test bench simulations to verify correctness of the designs. Lecture presentations are reinforced by many programming example problems so that skill in the languages is obtained. After completing this course, each student will have fundamental proficiency in both languages, and more importantly enough knowledge to continue learning and gaining expertise in Verilog and VHDL on their own....

Meilleurs avis

KK

Jun 05, 2020

This is very good course , but i found some little missing details related to reading materials .\n\nBut this was really very helpful course for me as fresher .

R

Jul 31, 2020

The course helped in showing the different styles of the Verilog and VHDL coding.\n\nUnderstood the advantages of Verilog and VHDL in real life applications

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1 - 25 sur 66 Avis pour Hardware Description Languages for FPGA Design

par Michael J M

Feb 08, 2020

This course is confusing and not laid out in a way that is conducive to learning. I would be surprised to know what learning pedagogues the instructors tried to employ. This unfortunately is par for the course from my experience in the colorado university Electrical Engineering department. It is a classic case of "Im an engineer, being in my presence will impart knowledge on you. I don't have a lesson plan or even know what the scientific process of education entails"

This is a teach yourself course with numerous pages of reading but only one of the three books is provided.

In 5 minutes I found online resources for free with step by step examples, vhdl example code, pspice pin outs and testbenches to verify. FOR FREE!!!!!!!

luckily I am not seeking a piece of paper from CU BOULDER. I am seeking knowledge so I am going else where.

par Erik L

Jan 08, 2020

I wish I could give a higher rating, because it is an interesting course. But there are multiple issues with the content, presentation and assignments. I was assured by Coursera that the issues would be addressed by the course providers, but this has not happened.

par Ilan C

Dec 21, 2019

Too simple, no real practice; vhdl and verilog assignments are exactly the same

par Benjamin P A

Jan 28, 2020

So far this course isn't what I expected, very poor explained programming assignments. I'm currently at week 2 and the FIFO assignment and it is not explained very good.

par Joseph G

Jan 23, 2020

There are a lot of unfixed issues with this course and the instructors are AWOL.

par Meleah C

Jan 05, 2020

Between the huge gaps in the information taught and the extremely faulty software provided, this course is far too difficult. And I ALREADY know one of the languages taught. I can't imagine trying to take this course as a beginner. References are made to textbooks that are never introduced, the submit system for programming assignments is ridiculous, and ModelSim does not even provide error feedback, which is crucial for a beginner. Dropping this course.

par mostafa k e

Jul 07, 2020

I learned nothing

par Shashank V M

Dec 25, 2019

The course was practical and interesting.

par David T

Dec 28, 2019

Though some exercises are not well defined. It was fun to search and debug in the tools. It is one way to learn the great field of FPGA programming. Up to RiscV ...

par Ashish S T

Jan 08, 2020

The content is taught well and the material is helpful to prepare for more intricate circuit designs. I am very satisfied with the guidance through both languages - VHDL and Verilog.

However, there is little guidance for the assignments, many of which are open for interpretation. Unfortunately, this leads to extrapolating the proper instructions through trial and error while investigating simulation results. The course needs to improve clarity for homework assignments.

par Pratham N

May 30, 2020

An overall understanding can be gained after finishing this course, in areas involving Verilog, Digital Systems design using HDL, and a basic idea on how fpga's implement the code developed.

Had a great time learning and i'm very grateful to Univ of Colorado Boulder and Coursera for giving me this beautiful opportunity. And always cheers to Andrew Ng and team! Thank you guys.

par Miron I

Jan 06, 2020

I am giving 5 stars despite many complaints regarding the missing pieces that hampered our progress. But it was very challenging, and I am still not sure if the so called "errors on Coursera platform" weren't actually purposely introduced by both professor in order to stimulate our neurons in the pursuit of solutions. I am looking forward for the next in series.

par Prakhar C

May 22, 2020

This is really good course for beginners . One aspiring to learn something about verilog and vhdl programming languages could definitely go for this.The assignments and the quizzes are extremely well structured so that the aspirant could gain maximum out of it.

par Krutika k

Jun 05, 2020

This is very good course , but i found some little missing details related to reading materials .

But this was really very helpful course for me as fresher .

par REMALA V N

Jul 31, 2020

The course helped in showing the different styles of the Verilog and VHDL coding.

Understood the advantages of Verilog and VHDL in real life applications

par Karrar H

Jul 14, 2020

I had the opportunity to learn both VHDL and Verilog in same course. And compare the constructs of these two HDLs. Thank you very much. Best Regards

par vasudevan

Jan 16, 2020

Great experience. Nice learning opportunity. However, please include assignments which are little more diverse and difficult.

par Suhaas N

Jul 08, 2020

Though the support of this course is quite poor and the forum is really dull, the course in itself is really something!!

par VENKATESHWARAN K

Jun 22, 2020

WELL DEFINED EXPLANATION AND VERY GOOD MATERIALS PROVIDED WITH REAL DATA SHEET PROBLEMS TO BE ADDRESSED

par Jesus A R A

Aug 05, 2020

Nice course but the FIFO wasn't explained clearly in both time but I still completed it with some help

par Jakub L

Jul 08, 2020

Very nice entry level course, teaches the basic concepcts very clearly, overall great.

par silpa k v

May 06, 2020

Good description and Way of explaining.

Forums helping out more.

Thankyou.

par Ranjan Y

Apr 18, 2020

The course is best for beginners and very useful to practice the basics.

par Waseem A

Mar 22, 2020

This course really great and have a lot of fun to learn FPGA Designs.

par Chathura J G

Jul 07, 2020

Best Course I ever had. Lectures are extremely talented in teaching.