In this course, you will learn to design the computer architecture of complex modern microprocessors. All the features of this course are available for free. It does not offer a certificate upon completion.
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In this course, you will learn to design the computer architecture of complex modern microprocessors. All the features of this course are available for free. It does not offer a certificate upon completion.
This lecture will give you a broad overview of the course, as well as the description of architecture, micro-architecture and instruction set architectures.
This lecture covers the basic concept of pipeline and two different types of hazards.
This lecture covers control hazards and the motivation for caches.
This lecture covers cache characteristics and basic superscalar architecture.
This lecture covers the common issues for superscalar architecture.
This lecture covers different kinds of architectures for out-of-order processors.
This lecture covers the common methods used to improve the performance of out-of-order processors including register renaming and memory disambiguation.
This lecture covers the basic concept of very long instruction word (VLIW) processors.
This lecture covers the common methods used to improve VLIW performance.
This lecture covers the motivation and implementation of branch predictors.
This lecture covers the advanced mechanisms used to improve cache performance.
This lecture covers more advanced mechanisms used to improve cache performance.
This lecture covers memory management and protection.
This lecture covers the vector processor and optimizations for vector processors.
This lecture covers different types of multithreading.
This lecture covers the concepts of parallelism, consistency models, and basic parallel programming techniques.
This lecture covers the solutions for the consistency problem in parallel programming.
This lecture covers the implementation of small multiprocessors.
This lecture covers the design of interconnects for a multiprocessor.
This lecture covers the design of interconnects for multiprocessor and network topology.
This lecture covers the motivation and implementation of directory protocol used for coherence on large multiproccesors.
Excellent course! It was really nice to have a high-level course, and I feel like this course makes a great substitute for the Computer Architecture course offered in my university.
The way of Professor is teaching is fabulous !!\n\nContent of the course is amazing.\n\nHe has planned the course in such a way that new students can also understand the concepts.
Quand aurai-je accès aux vidéos de cours et aux devoirs ?
Une fois que vous êtes inscrit(e) pour un Certificat, vous pouvez accéder à toutes les vidéos de cours, et à tous les quiz et exercices de programmation (le cas échéant). Vous pouvez soumettre des devoirs à examiner par vos pairs et en examiner vous-même uniquement après le début de votre session. Si vous préférez explorer le cours sans l'acheter, vous ne serez peut-être pas en mesure d'accéder à certains devoirs.
D'autres questions ? Visitez le Centre d'Aide pour les Etudiants.