Ce cours fait partie de la Spécialisation FPGA Design for Embedded Systems

4.8
étoiles
14 évaluations

Timothy Scherr

4 296 déjà inscrits

Offert par

Dans le cadre du diplôme Master of Science in Electrical Engineering

Spécialisation FPGA Design for Embedded SystemsUniversité du Colorado à Boulder

À propos de ce cours

7 001 consultations récentes

This course will give you hands-on FPGA design experience that uses all the concepts and skills you have developed up to now.   You will need to purchase a DE10-Lite development kit.  You will setup and test the MAX10 DE10-Lite board using the FPGA design tool Quartus Prime and the System Builder.
You will:  
Design and test a Binary Coded Decimal Adder. 
Design and test a PWM Circuit, with verification by simulation. 
Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design. 
Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer). Instantiate this design into a top-level DE10-Lite HDL file.
Compile your completed hardware using Quartus Prime.  
Enhance and test a working design, using most aspects of the Quartus Prime Design Flow and the NIOS II Software Build Tools (SBT) for Eclipse.
Create software for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer) and the SBT.
Compile your completed software using the SBT.
Use Quartus Prime to program both the FPGA hardware configuration and software code in you DE10-Lite development kit.  
Record all your observations in a lab notebook pdf. 
Submit your project files and lab notebook for grading.
This course consists of 4 modules, approximately 1 per week for 4 weeks.   Each module will include an hour or less of video lectures, plus reading assignments, discussion prompts, and project assignment that involves creating hardware and/or software in the FPGA.

Dates limites flexibles

Réinitialisez les dates limites selon votre disponibilité.

Certificat partageable

Obtenez un Certificat lorsque vous terminez

100 % en ligne

Commencez dès maintenant et apprenez aux horaires qui vous conviennent.

Cours 4 sur 4 dans le

Spécialisation FPGA Design for Embedded Systems

Niveau intermédiaire

You should have a experience in digital design and C programming before taking this course, and also complete the first 3 courses in this series.

Approx. 29 heures pour terminer

Anglais

Sous-titres : Français, Portugais (européen), Russe, Anglais, Espagnol

Ce que vous allez apprendre

Create a working FPGA design using Quartus Prime and run it on an evaluation board
Understand and practice all aspects of FPGA development, including conception, design, implementation, and debugging.
Create in the FPGA a working system on a chip design with Nios II soft processor, RAM and FLASH memory, and several peripherals.
Become familiar with the FGPA development flow, particularly in the case of a SoC with software development flow included.

Compétences que vous acquerrez

Softcore Processor Design
Programmable Logic Design

Dates limites flexibles

Réinitialisez les dates limites selon votre disponibilité.

Certificat partageable

Obtenez un Certificat lorsque vous terminez

100 % en ligne

Commencez dès maintenant et apprenez aux horaires qui vous conviennent.

Cours 4 sur 4 dans le

Spécialisation FPGA Design for Embedded Systems

Niveau intermédiaire

You should have a experience in digital design and C programming before taking this course, and also complete the first 3 courses in this series.

Approx. 29 heures pour terminer

Anglais

Sous-titres : Français, Portugais (européen), Russe, Anglais, Espagnol

Enseignant

Évaluation de l'enseignant

4,83/5 (6 évaluations)

Timothy Scherr

Senior Instructor and Professor of Engineering Practice

Electrical, Computer, and Energy Engineering

75 837 étudiants

5 cours

Offert par

Université du Colorado à Boulder

CU-Boulder is a dynamic community of scholars and learners on one of the most spectacular college campuses in the country. As one of 34 U.S. public institutions in the prestigious Association of American Universities (AAU), we have a proud tradition of academic excellence, with five Nobel laureates and more than 50 members of prestigious academic academies.

Commencez à travailler pour obtenir votre master

Ce cours fait partie du diplôme intégralement en ligne Master of Science in Electrical Engineering de Université du Colorado à Boulder. Si vous êtes admis(e) au programme complet, vos cours sont pris en compte dans votre apprentissage diplômant.

Programme de cours : ce que vous apprendrez dans ce cours

Semaine

Semaine 1

10 heures pour terminer

Hands on: Altera MAX10 Hardware Setup

In this module you will begin your hands-on exploration of FPGA design by setting up a target board, the DE10-Lite based on the MAX10 Intel Altera FPGA. In this module you will

10 heures pour terminer

5 vidéos (Total 15 min), 4 lectures, 8 quiz

5 vidéos

FPGA Capstone: Building FPGA Projects Course Introduction2 min

Capstone Project: Starting FPGA Design1 min

Board Setup and Test1 min

Expected Outcomes for Module 15 min

Tips for Success3 min

4 lectures

How to Purchase the DE10-Lite Development Kit10 min

FPGA Captstone: Building FPGA Projects Assessment Strategy10 min

Module 1 Project Guide30 min

Lab Notebook Template20 min

1 exercice pour s'entraîner

Module 1 Quiz30 min

Semaine

Semaine 2

8 heures pour terminer

Develop a Mixed Signal System

The goal of this module is to develop a mixed-signal system. You will construct hardware that uses the Analog to Digital Converter (ADC) inputs and Pulse Width Modulate (PWM) outputs to make a voltage measuring instrument. In this module you will

 Create a working design, using most aspects of the Quartus Prime Design Flow.  Design and test a PWM Circuit, with verification by simulation.  Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design.  Record all your observations in a lab notebook pdf.  Submit your project files and lab notebook for grading. Completing this module will help prepare you for the work to be done in the modules that follow.

8 heures pour terminer

2 vidéos (Total 4 min), 1 lecture, 4 quiz

Semaine

Semaine 3

8 heures pour terminer

Create a System on a Chip with NIOS II

The goal of this module is to develop the hardware for a System on a Chip (SoC). You will construct hardware that creates a NIOS II soft processor along with several interfaces to devices on the DE10-Lite development kit. In this module you will

 Create a working design, using most aspects of the Quartus Prime Design Flow.  Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Builder). Instantiate this design into a top-level DE10-Lite HDL file.  Compile your completed hardware using Quartus Prime.  Record all your observations in a lab notebook.  Submit your project files and lab notebook for grading. Completing this module will provide a platform for the work to be done in the module that follows.

8 heures pour terminer

2 vidéos (Total 5 min), 1 lecture, 3 quiz

Semaine

Semaine 4

5 heures pour terminer

Software for a System on a Chip

The goal of this module is to develop the software for a System on a Chip (SoC). You will build software for a NIOS II soft processor you built in Module 3, using several interfaces to devices on the DE10-Lite development kit as well. In this module you will

 Enhance and test a working design, using most aspects of the Quartus Prime Design Flow and the NIOS II Software Build Tools (SBT) for Eclipse.  Create software for the NIOS II soft processor, including many interfaces, using Qsys (Platform Builder) and the SBT.  Compile your completed software using the SBT.  Use Quartus Prime to program both the FPGA hardware configuration and software code in you DE10-Lite development kit. You will then test your new embedded system.  Record all your observations in a lab notebook pdf.  Submit your project files and lab notebook for grading. Completing this module will finish your work for this course.

5 heures pour terminer

2 vidéos (Total 5 min), 1 lecture, 3 quiz

Avis

4.8

5 avis

5 stars
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4 stars
7,14 %
3 stars
7,14 %

Meilleurs avis pour FPGA CAPSTONE: BUILDING FPGA PROJECTS

par CL25 janv. 2022

In general a good course structure and content. It lacks support on question and exercises.

par DK28 mai 2021

Requires knowledge of FPGA design flow (make sure to take 3 courses before this one), great practical tasks that complete the whole specialization.

par OS27 janv. 2021

This specialization has a very good balance between deepness and breadth of transmitted knowledge. Thank you !

Voir tous les avis

À propos du Spécialisation FPGA Design for Embedded Systems

The objective of this course is to acquire proficiency with Field Programmable Gate Arrays (FPGA)s for the purpose of creating prototypes or products for a variety of applications. Although FPGA design can be a complex topic, we will introduce it so that, with a little bit of effort, the basic concepts will be easily learned, while also providing a challenge for the more experienced designer. We will explore complexities, capabilities and trends of Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD). Conception, design, implementation, and debugging skills will be practiced. We will learn specifics around embedded IP and processor cores, including tradeoffs between implementing versus acquiring IP. Projects will involve the latest software and FPGA development tools and hardware platforms to help develop a broad perspective of the capabilities of various Programmable SoC solutions. Topics include:

Verilog, VHDL, and RTL design for FPGA and CPLD architectures FPGA development tools flow: specify, synthesize, simulate, compile, program and debug Configurable embedded processors and embedded software Use of soft-core and hard-core processors and OS options FPGA System engineering, software-hardware integration, and testing IP development and incorporating 3rd-party IP The capstone course will give the learner the opportunity to practice and implement the concepts covered by building FPGA systems based on low cost evaluation boards.

Foire Aux Questions

Quand aurai-je accès aux vidéos de cours et aux devoirs ?
L’accès à des vidéos de cours et des devoirs dépend de votre type d’inscription. Si vous suivez un cours en mode auditeur libre, vous pourrez voir la plupart des contenus de cours gratuitement. Pour accéder aux devoirs notés et obtenir un certificat, vous devrez acheter une expérience de certificat, pendant ou après avoir assister au cours en tant qu’auditeur libre. Si vous ne visualisez pas l’option auditeur libre :
Il est possible que le cours ne propose pas d’option auditeur libre. Vous pouvez en revanche accéder à un essai gratuit ou faire une demande d'aide financière.
Le cours propose peut-être « Cours complet, aucun certificat » à la place. Cette option vous permet de voir tous les contenus de cours, de soumettre les évaluations requises et d'obtenir une note finale. Cependant, vous ne pourrez pas acheter une expérience de certificat.
À quoi ai-je droit si je m'abonne à cette Spécialisation ?
Lorsque vous vous inscrivez au cours, vous bénéficiez d'un accès à tous les cours de la Spécialisation, et vous obtenez un Certificat lorsque vous avez réussi. Votre Certificat électronique est alors ajouté à votre page Accomplissements. À partir de cette page, vous pouvez imprimer votre Certificat ou l'ajouter à votre profil LinkedIn. Si vous souhaitez seulement lire et visualiser le contenu du cours, vous pouvez accéder gratuitement au cours en tant qu'auditeur libre.
Une aide financière est-elle possible ?
Oui. Dans certains programmes d’apprentissage, vous pouvez demander une aide financière ou une bourse d’études si vous ne pouvez pas payer les frais d’inscription. Si une aide financière ou une bourse d’études est disponible pour le programme d’apprentissage choisi, vous trouverez un lien pour faire une demande sur la page de description.

D'autres questions ? Visitez le Centre d'Aide pour les Étudiants.

FPGA Capstone: Building FPGA Projects